| 1 | What is the company's focus? |
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| 2 | What is Atmospheric Downstream Plasma (ADP)? |
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| 3 | What are the applications for ADP? |
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| 4 | Why an atmospheric pressure plasma gas etch? |
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| 5 | What gases are used for silicon etching? |
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| 6 | What is the wafer temperature during etch? |
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| 7 | What is the material etch rate? |
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| 8 | What is the process uniformity and repeatability? |
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| 9 | Do you have wafer oxidation during etching? |
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| 10 | Does ADP leave any metal or particle contamination on the surface? |
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| 11 | Does ADP affect the electrical characteristics of semiconductor devices? |
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| 12 | Why should I add ADP etching to my line if I already have back grinding? |
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| 13 | Can you etch materials through photo-resist mask? |
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| 14 | Can you strip photo-resist by ADP? |
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| 15 | Is ADP cost-effective? |
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| 16 | What is the structure of the ADP equipment? |
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| 17 | What method is used to hold wafers in the process carousel? |
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| 18 | What wafer size can ADP process? |
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| 19 | How much time do you need to change from one wafer size set up to another? |
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| 20 | What are the exhaust products? |
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| 21 | What is the equipment throughput? |
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| 22 | Is the equipment simple to operate? |
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| 23 | Do you have production installations? |
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| 24 | How do I handle ultra-thin wafers before and/or after the Tru-Etch system? |
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| 25 | What is "flexible integration," and how can it benefit me? |
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| 26 | Do you have any flexible integration installations? |
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| 27 | What is the cost of a flexible integration installation? |
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| 28 | What is your "Thru-Silicon" Technology? |
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| 29 | Why is Thru-Silicon useful? |
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| 30 | Are you working with IC manufacturers on Thru-Silicon Processes? |
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| 1 | What is the company's focus? |
| | Founded in 1997, Tru-Si Technologies, Inc. provides atmospheric downstream plasma (ADP) processing equipment to the semiconductor industry in order to meet
increasing wireless, portable, networking, and internet market demands for smaller, thinner, cheaper, and more integrated electronic devices. With its proprietary ADP
gas-etch system, the company delivers cost efficient manufacturing solutions such as damage free thinning, damage free dicing and damage free handling as well as
Thru-Silicon vias. Our equipment business is focused on providing total thinning solutions for chip makers.
Tru-Si also develops an IP business based on its Thru-Silicon interconnection vias. This interconnection technology maintains the economies of scale inherent in
processing whole wafers by providing through-silicon vertical interconnections between the front and backsides of a wafer in a manner similar to that of through-holes in
printed circuit boards. New generations of 3D system-in-a-package solutions enabled by Thru-Silicon vias are in the high demand by major semiconductor manufacturers.
The Company began marketing its Thru-Silicon vias in late 1999 and has since received strong interest from various companies.
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| 2 | What is Atmospheric Downstream Plasma (ADP)? |
| | Atmospheric Downstream Plasma uses a Direct Current (DC) plasma generated in an argon flow in an atmospheric pressure chamber. The reactant gas is injected into
this plasma, where it is cracked into its constituent atoms. The reactant atoms become neutral downstream of the plasma, so the wafer is not subject to the charged
particles typical of plasma processing.
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| 3 | What are the applications for ADP?  |
| | The process applications are:
- Silicon wafer thinning, with optional surface roughening
- Backside wafer etching for silicon oxide, silicon nitride and poly-silicon film removal.
- Backside damage and stress removal after grinding or lapping.
- Isotropic etching through a mask.
- Advanced applications such as damage free dicing, through silicon interconnects and stacked ICs.
These process capabilities are beneficial for product applications such as power devices, smart cards, stack memory packages, hand-held products and advanced
high-density applications. |
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| 4 | Why an atmospheric pressure plasma gas etch?  |
| | Atmospheric gas etching is simple and cost effective. Using an atmospheric chamber means no vacuum pumps, a simpler atmospheric robot and no loss of time due to
regenerations or pump downs.
Using the arc type plasma at atmospheric pressure, a very high temperature can be attained in the heart of the plasma, giving the plasma the ability to create a very high
density of etching atoms. With the high density of etching atoms, high etch rates can be obtained.
Atmospheric operation yields a very small mean free path (less than one micron) downstream of the plasma. The etching atoms experience a large number of collisions
downstream of the plasma, which ensures that they are neutral by the time they reach the wafer. This is the main reason for atmospheric operation.
In addition, unwanted species react with the air and become inert. Atmospheric pressure also allows the use of positive gas flow for the NoTouchTM holder during etch. |
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| 5 | What gases are used for silicon etching?  |
| | ADP commonly uses carbon tetrafluoride, also called tetra-fluoromethane (CF4) and oxygen in the etching process. Other fluorine containing gases can be used (see
product spec). The basic chemical reaction sequence responsible for silicon removal is:
CF4 → C + 4F
C + O2 → CO2
Si + 4F → SiF4(gas)
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| 6 | What is the wafer temperature during etch? |
| | Wafer temperature during etch can be controlled from 160oC to 300oC (320oF to 572oF). Wafers are etched in mini-batches held in a carousel. The carousel passes the
wafers over the plasma in a pattern designed for optimum uniformity. The temperature is controlled by the traveling speed of the wafers. The etch rate generally increases
with temperature.
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| 7 | What is the material etch rate?  |
| | Silicon etch rate is up to 4 µm/min depending on the process recipe and wafer size used. For silicon dioxide and silicon nitride the etch rate is up to 1 µm/min.
The machine processes a mini batch of wafers, which increases the equivalent etch rate. For example, 200 mm wafers are processed five at a time, so the equivalent rate
is five times the material etch rate.
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| 8 | What is the process uniformity and repeatability? |
| | Removal uniformity is about ± 3% total. The repeatability wafer-to-wafer and lot-to-lot is ± 2% total. This compares very favorably with other thinning methods. In addition, a
system improvement has been developed that has demonstrated better than 1% uniformity of removal.
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| 9 | Do you have wafer oxidation during etching?  |
| | There is no wafer oxidation during etching. In fact, oxide is etched if it is present on the back of the wafer.
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| 10 | Does ADP leave any metal or particle contamination on the surface?  |
| | There is no added metal contamination of the etched surface. Particles are etched off the wafer. The ADP system is designed as a class 10 machine, to prevent added
particulate contamination.
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| 11 | Does ADP affect the electrical characteristics of semiconductor devices?  |
| | Due to the very small mean free path of ions at atmospheric pressure, no ions get to the wafer. The NoTouchTM wafer holders do not alter the circuitry, since they are not
electrostatic. Extensive tests have shown that no electrical damage is caused to wafers etched using ADP.
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| 12 | Why should I add ADP etching to my line if I already have back grinding? |
| | ADP gas etching does not replace grinding, but ADP can be used to remove damage after grinding, which improves wafer strength and die strength. ADP etching can thin
wafers beyond the practical limits that grinders have, and it can be used in tandem with grinding to obtain optimal cost of ownership for any given thinning target down to
50 µm.
ADP gas etching provides damage removal and thinning of virtually any type of silicon wafer, including those with front side bumps, air bridges, MEMS structures and
others. ADP does not require additional protective or cleaning steps to achieve high yield manufacturing of silicon wafers.
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| 13 | Can you etch materials through photo-resist mask?  |
| | Yes the ADP system does an isotropic etch through photo resist masks. It can also do deep etching through metal or polyimide masks.
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| 14 | Can you strip photo-resist by ADP?  |
| | Organic materials like photo-resists or polyimide may be removed from the wafer surface in argon or oxygen contained plasmas. The striping is aggressive enough to even
get rid of photo resist on top of ion-implanted silicon.
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| 15 | Is ADP cost-effective?  |
| | Yes! Because the system uses two inexpensive gases, argon and carbon tetrafluoride (or other fluorine source), the consumables cost is low. Effluent disposal is
inexpensive, requiring just an exhaust system and a scrubber. For detailed cost of ownership information for your application, please contact a sales representative.
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| 16 | What is the structure of the ADP equipment?  |
| | Tru-Si Technologies ADP equipment has two main sections, a process section and a wafer transport section. The processing section has a process carousel that moves
the wafers over the plasma in a pattern and a plasmatron that generates and controls the plasma.
The wafer transport section consists of a robot that loads wafers out of a cassette or load port and transfers them to one of a pair of shuttles. The shuttles transfer the
wafers to and from the process area. Three 300 mm, five 200 mm or eight 150 mm wafers are loaded at a time for processing.
Both these sections are in the same enclosure, which is bathed in air from a HEPA or ULPA filtered mini environment to control the particle count. An isolation door is
used between the two sections.
For the UT (ultra-thin) option, the wafer handling robot, shuttles and the carousel all use NoTouchTM handling to guarantee that wafers are held flat, without damage in
applications requiring thinning as far as 50 µm. The NT option uses lower cost shuttles, which enable thinning to 100 µm.For detailed specifications, contact a sales representative.
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| 17 | What method is used to hold wafers in the process carousel?  |
| | Tru-Si's patented NoTouchTM handling process includes a specially designed wafer holder that levitates the wafers in a cushion of air using multiple gas vortices. This
protects the front side of the wafers, without touching them. The front side of the wafer requires no protection, and front side structures, such as bumps, are literally
untouched.
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| 18 | What wafer size can ADP process?  |
| | Tru-Si Technologies ADP equipment is designed to run virtually any wafer size from 100 mm (4") up to 300 mm (12") with upgrade kits. We are currently processing
wafers throughout this range.
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| 19 | How much time do you need to change from one wafer size set up to another?  |
| | Initially, it takes a few hours to complete a switch to a particular wafer size. Once the settings for a given wafer size are determined, subsequent changes to that size take
less time. The software used is configurable to any size process requirement. |
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| 20 | What are the exhaust products? |
| | When using CF4, the main exhaust products are typical of silicon etching, except that there is no CF4 in the exhaust. Tru-Si had effluent testing performed by a third party and the results are that a simple water scrubber is very effective in all circumstances. |
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| 21 | What is the equipment throughput? |
| | The throughput depends on the amount of etching required, the maximum temperature and the size of the wafer. For information on the throughput of our equipment as
configured to meet your specific needs, please contact one of our sales representatives. |
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| 22 | Is the equipment simple to operate?  |
| | Yes! The system is operated through a simple graphic user interface. We have a demonstration video available through our sales representatives. |
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| 23 | Do you have production installations?  |
| | Yes. Tru-Si has production installations at major semiconductor manufacturers' sites in Japan, Southeast Asia, the U.S. and Europe. We have extensive field experience
not only with our ADP etch tool, but also with the integration of our tool into advanced thinning processes. |
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| 24 | How do I handle ultra-thin wafers before and/or after the Tru-Etch system? |
| | Handling of ultra-thin wafers is a difficult task in its own right. Ultra-thin wafers can have severe warp or bow, depending on the films applied to the front side. They can also
be too flimsy to stay in a slot in a cassette. Tru-Si has developed a great deal of experience in the successful handling of these wafers, and is willing to put this
experience at your disposal.
Tru-Si has adapted its NoTouchTM handling technology for use outside the Tru-Etch system. Using NoTouchTM robots and commercially available wafer stacking pods,
wafers can be handled before and after thinning.
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| 25 | What is "flexible integration," and how can it benefit me? |
| | Advanced thinning of silicon wafers requires specialized handling techniques in addition to thinning equipment. Tru-Si's flexible integration approach will allow companies
to use equipment of their choosing for process steps such as grinding, detaping and dicing.
Tru-Si's NoTouchTM robots and commercially available wafer stacking pods are added between each tool in the thinning line, thus wafers can be handled before and after
thinning, while keeping warp and damage under control.
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| 26 | Do you have any flexible integration installations? |
| | Yes. Our first flexible integration installation was performed for a major semiconductor manufacturer in Japan. |
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| 27 | What is the cost of a flexible integration installation? |
| | Every wafer fab is unique in the tools and the process sequence used, so the cost of installing a flexible integration solution varies depending on customer requirements.
We would be happy to discuss how we could meet your specific needs.
For more information, contact the sales representative in your area, or contact us directly. |
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| 28 | What is your "Thru-Silicon" Technology? |
| | Our Thru-Silicon interconnect technology provides an efficient, cost effective way to create three-dimensional ICs. By making vias through the silicon die, high density
interconnections can be made to other die, either above, below or both.
The efficiency and cost-effectiveness of the process comes from the fact that most of the work is done on the front of the wafer, with only a few extra steps. Exposing the
contacts on the backside is actually a byproduct of thinning with our ADP gas etch. There is no going back and forth between the front and back of the wafer to perform
process steps.
First, the vias are made from the front side. A 1-2 micron thick layer of oxide is then deposited to provide insulation. This is followed by an adhesion layer deposition, and
a metal deposition. The via can then be filled with any suitable material, such as a metal. There is some flexibility in choosing the specific via making technique and the
sequence of integrating these steps with standard front-side processing.
On the backside, the final thinning step is done with ADP etching. It etches both the silicon and the oxide, but since it etches the oxide at a slower rate, an insulating
oxide collar protrudes from the silicon.
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| 29 | Why is Thru-Silicon useful? |
| | The performance of ICs and systems is starting to be limited by interconnects, not by transistors. The move to copper wiring and low-k dielectrics is one response to this
fact, and the creation of innovative architectures is another. Stacking die in a three dimensional arrangement, with interconnections going through the die, provides a highly
efficient means to address this limitation. It also provides a way to integrate electronic systems with very high density. |
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| 30 | Are you working with IC manufacturers on Thru-Silicon Processes?  |
| | Yes, we have joint development projects in progress with IC manufacturers. |